1. Field of the Invention
The present invention relates to a method for compensating for a time error of a time/frequency generator using a global positioning system (referred to hereinafter as GPS) which generates a signal to be used as the time/frequency source of a base station and an exchange in a code division multiple access (CDMA) mobile communication system, or to be used for the synchronization between the existing telephone exchanges.
2. Description of the Prior Art
FIG. 1 is a block diagram of a time/frequency generator using a GPS. As shown in this drawing, the time/frequency generator comprises a GPS signal receiver 1 for receiving a 1PPS signal 8 from the GPS, a comparator 2 for comparing the 1PPS signal 9 received by the GPS signal receiver 1 with an internal 1PPS signal 9, a processor 3 for analyzing an output signal from the comparator 2, a digital/analog converter 4 for converting a digital signal from the processor 3 into an analog signal, an internal oscillator 5 for generating a 10 MHz signal, a frequency divider 6 for dividing a frequency of the 10 MHz signal generated by the internal oscillator 5 to generate the internal 1PPS signal 9, and a variable phase delay 7 for delaying a phase of the internal 1PPS signal 9 generated by the frequency divider 6 and outputting the resultant internal 1PPS signal 10 to the comparator 2.
The operation of the time/frequency generator with the above-mentioned construction will hereinafter be described.
First, the internal oscillator 5 generates the 10 MHz signal, the frequency of which is then divided by the frequency divider 6 to generate the internal 1PPS signal 9. The internal 1PPS signal 9 generated by the frequency divider 6 is delayed in phase by the variable phase delay 7, and the resulting delayed internal 1PPS signal 10 is fed to the comparator 2. The comparator 2 compares the 1PPS signal 8 received by the GPS signal receiver 1 with the internal 1PPS signal 10 fed by the variable phase delay 7 and outputs the compared result to the processor 3. The processor 3 processes the result compared by the comparator 2 and outputs the processed result to the digital/analog converter 4, which then converts it into an analog signal to control the signal generation of the internal oscillator 5.
The above-mentioned time/frequency generator using the GPS is adapted to provide a 1PPS signal in synchronization with a universal time coordinate (referred to hereinafter as UTC), not shown, by comparing and analyzing the 1PPS signal 8 received by the GPS signal receiver 1 with the internal 1PPS signal 10 derived from the internal oscillator 5 and delayed. The 1PPS signal 8 received by the GPS signal receiver 1 is beyond the UTC on the order of the maximum .+-.300 nsec and has a large time variation at every second. However, the 1PPS signal 8 received by the GPS signal receiver 1 has no error accumulation over a long period of time. On the other hand, the internal 1PPS signal 9, obtained by dividing the frequency of the 10 MHz signal from the internal oscillator 5, has a fixed time variation at every second, but is liable to continue to flow unidirectionally when it is left under no control as it is. The characteristic of the oscillator 5 can be recognized by comparing and estimating the two 1PPS signals 8, 10 with the above-mentioned different properties. Hence, the oscillator 5 can be controlled in accordance with the recognized result.
In the above-mentioned time/frequency generator using the generic GPS, however, a time error control operation is not performed during the frequency estimation operation, resulting in the occurrence of a large time error due to a frequency error after the frequency estimation operation is completed. Such a large time error causes a considerable amount of time jump, which is fatally disadvantageous to a system requiring a stable time.
Accordingly, an apparatus or a method for more efficiently compensating for the time error is required for the system stability.
An example of such a time error compensating apparatus is shown in U.S. Pat. No. 4,280,099.
This patent relates to a digital timing recovery system for compensating for a time error of a timing clock signal. The digital timing recovery system comprises an oscillator for generating a fixed frequency signal, clock derivation means for dividing a frequency of the fixed frequency signal from the frequency generator by m to derive the clock signal therefrom, data transition detector means for detecting transitions of received data, time comparison means coupled to the oscillator, clock derivation means and data transition detector means for comparing output signals therefrom with one another, and update means for updating the value of m in response to the results compared by the time comparison means.
In the above patent, the phase of the received data is detected by a phase detector and the transition thereof is detected by the data transition detector means at the detected phase. The clock derivation means is adapted to derive the clock signal from the fixed frequency signal generated by the oscillator by dividing the frequency thereof by m. The time comparison means is adapted to compare the time at which the data transition occurs, with the time at which a clocking transition of the clock signal occurs. The update means is adapted to update the value of m in accordance with the results compared by the time comparison means. In this manner, the timing clock signal is recovered.
The above-mentioned digital timing recovery system is advantageous in that it generates the clock signal more accurately by detecting a phase error of the received data and compensating for an error of the clock signal according to the detected phase error.
However, the above-mentioned digital timing recovery system has a disadvantage in that it compensates for only a time error, not for a frequency error. For this reason, the above-mentioned digital timing recovery system is limited in the application to a time/frequency generator using a GPS requiring the compensation for both the time and frequency errors. Moreover, further hardware must be configured.